The present invention relates generally to fuses, and, more particularly, uses formed over a semiconductor substrate having controlled and predictable areas of degradation.
In the semiconductor industry, fuse elements are a widely used feature in integrated circuits for a variety of purposes, such as improving manufacturing yield or customizing a generic integrated circuit. For example, by replacing defective circuits on a chip with duplicate or redundant circuits on the same chip, manufacturing yields can be significantly increased. Typically, in order to replace a defective circuit or memory cell, conductive connections, or fuses, are cut or xe2x80x9cblownxe2x80x9d, thereby allowing a redundant circuit to be used in place of the defective circuit. It is also common practice in the manufacture of integrated circuits to provide for customization of chips or modules to adapt chips to specific applications. By selectively blowing fuses within an integrated circuit which has multiple potential uses, a generic integrated circuit design may be economically manufactured and adapted to a variety of custom uses.
Typically, fuses or fusible links are incorporated in the design of the integrated circuit, wherein the fuses are selectively blown, for example, by passing an electrical current of a sufficient magnitude to cause the fusible link to change its structure, for example, by melting or otherwise become altered, thereby creating a more resistive path or an open circuit. Alternatively, a current that is weaker than the current required to entirely blow the fuse can be applied to the fuse in order to degrade the fuse, thus increasing a resistance through the fuse. The process of selectively blowing or degrading fuses is often referred to as xe2x80x9cprogrammingxe2x80x9d. An alternative to blowing fusible links with an electrical current is to open a window above each fuse to be blown, use a laser to blow each of the fuses, and then fill the windows with a passivation layer. Blowing the fuses with a laser, however, can potentially increase manufacturing costs, since additional components such as the laser and other associated equipment for alignment of the laser is generally required.
One exemplary conventional fuse which can be blown using a programming current is illustrated in FIGS. 1A-1C. FIGS. 1A and 1B illustrate a top plan view and a cross-section, respectively, of a portion 10 of an integrated circuit (not shown) comprising a conventional fuse 15 prior to programming. FIG. 1A illustrates the fuse 15 which has been formed over an insulation layer 20, wherein the fuse comprises two contacts 30 which are in electrical contact with an electrically conducting silicide layer 40. As illustrated in cross-section in FIG. 1B, the silicide layer 40 is disposed over a polysilicon layer 50, wherein the silicide layer 40 and the polysilicon layer 50 are generally arranged in a stack 55 residing over the insulation layer 20. Typically, the insulation layer 20 is an oxide layer which has been deposited or grown on a semiconductor substrate 60, such as monocrystalline silicon. Furthermore, the fuse 15 is generally covered with an insulative passivation layer 70 to electrically isolate the fuse from other devices (not shown).
During programming and operation, electrical current flowing through the fuse 15 will generally proceed from one contact 30A, through the silicide layer 40, to the other contact 30B. If the current is increased to a level that exceeds a predetermined threshold current of the fuse 15, the silicide layer 40 will change its state, for example, by melting, thereby altering a resistance of the structure. Note that depending on the sensitivity of the sensing circuitry (e.g., a sense amp), a fuse may be considered xe2x80x9cblownxe2x80x9d if a change in resistance is only modest. Therefore the term xe2x80x9cblowingxe2x80x9d a fuse may be considered to broadly cover a modest alteration of the resistance or alternatively may comprise a complete open circuit. FIG. 1C illustrates the cross section of the fuse 15 shown in FIG. 1B after the fuse has been programmed (e.g., a xe2x80x9cblownxe2x80x9d fuse), wherein the programming current has effectively melted or otherwise altered a state of the silicide layer 40 in a region 75, thereby forming a discontinuity 85 in the silicide layer, wherein agglomerations 80 of silicide are formed on either side of the discontinuity.
The fuse 15 of the prior art, however, does not allow for reliable localization of the discontinuity 85 and agglomerations 80 in the silicide layer 40. In other words, the region 75 of the fuse 15 that is melted can potentially occur at any location in the silicide layer 40 between the contacts 30 during programming. Since conventional processes involved in melting the silicide layer 40 typically generate a significant amount of potentially damaging heat, it is desirable to predict the region 75 in which the discontinuity 85 is potentially formed, and to further reduce an area (not shown) of the discontinuity in order to reduce an amount of energy required to program the fuse 15.
Predicting the region 75 and reducing the area (not shown) of the potential discontinuity 85 may also reduce a potential for damage to adjacent components (not shown) when the fuse 15 is programmed. As illustrated in FIG. 1D, conventional attempts to localize the discontinuity (not shown) to a predefined region 90 of the silicide layer 40 have included narrowing regions 92 of the silicide layer 40 between generally equally-sized contacts 30 to form a narrowed region 95 (e.g., forming a xe2x80x9cneckxe2x80x9d). Other conventional attempts to minimize damage to a predefined region of the silicide layer have included extra process steps to form a weakness in the silicide layer, wherein the silicide melts under programming current.
Conventional fuse designs, however, have typically not eliminated the unwanted damage caused by blowing a fuse, or have added extra process steps, cost, or undesirable design qualities to the final product. Furthermore, commonly used fuses in the prior art have a relatively high parasitic resistance, making programming of the fuse more difficult, and raising concerns over stability and reliability of the fuse over time. Therefore, what is needed in the art is a reliable fuse that is fabricated such that programming of the fuse will result in reproducible degrading and melting of a silicide layer which uses less energy than conventional techniques, and wherein additional process steps are not required in the manufacture of the fuse.
The following presents a simplified summary of the invention in order to provide a basic understanding of some aspects of the invention. This summary is not an extensive overview of the invention. It is intended to neither identify key or critical elements of the invention nor delineate the scope of the invention. Its purpose is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later.
The present invention relates generally to a fuse formed over a semiconductor substrate. According to one exemplary aspect of the present invention, the fuse resides over a patterned polysilicon layer, wherein a first region and a second region are defined. A silicide layer resides over the polysilicon layer, and a first contact member and a second contact member electrically contact the silicide layer in the first region and second region, respectively, thereby defining a first interface having a first contact area between the first contact member and the silicide layer, and a second interface having a second contact area between the second contact member and the silicide layer.
According to one exemplary aspect of the present invention, the second contact area is smaller than the first contact area, wherein the second interface defines a fusible link. During programming of the fuse, a current density in the second region is greater than a current density in the first region when a programming current is applied to the first contact member, and the programming current is operable to melt or otherwise alter the fusible link, thereby electrically isolating the first contact member from the second contact member.
According to another exemplary aspect of the present invention, a width of patterned polysilicon layer is generally tapered, wherein a first width associated with the first region is larger than a second width associated with the second region. The tapered polysilicon layer furthermore increases the current density in the second region compared to the first region when the fuse is programmed with the programming current. According to yet another aspect of the present invention, the second contact member is generally frustoconical in shape, the second contact member comprising a narrow end and a wide end, wherein a narrow end contacts the second contact area, thereby increasing the current density in the second region and at the second interface associated therewith.
According to still another exemplary aspect of the present invention, a method for forming a fuse over a silicon substrate is provided. The method begins with forming a polysilicon layer over a semiconductor substrate, and subsequently forming a silicide layer over the polysilicon layer. The silicide layer and polysilicon layer are patterned, whereby a fuse region comprising a first region and a second region is defined. A dielectric layer is formed over the substrate, and the dielectric layer is subsequently patterned, wherein a first contact hole and a second contact hole are defined in the first region and second region, respectively, wherein the first contact hole is larger than the second contact hole.
A plug metal is then deposited over the substrate, wherein the first contact hole and the second contact hole are filled by the plug metal, thereby defining a first contact member and a second contact member, respectively. According to one aspect of the invention, an interface between the second contact member and the silicide defines a fusible link. The plug metal is then planarized to at least the dielectric layer, thereby defining a fuse comprising the first contact, the second contact, the fusible link. According to another exemplary aspect of the invention, a wiring layer is subsequently patterned over the first contact member and second contact member, wherein the wiring layer interconnects the fuse to other components formed over the substrate.